Embodiments of the invention relate to a memory system, and more particularly to a technology for performing data interfacing between a Dynamic Random Access Memory (DRAM) and a non-volatile memory device.
Semiconductor memory devices are classified into a volatile memory device and a non-volatile memory device according to whether data is retained when a power source is cut off.
As semiconductor memory devices have been rapidly developed to be manufactured with larger capacitance and smaller sizes, DRAM devices from among volatile memory devices have been widely used and NAND flash memory devices from among non-volatile memory devices have been widely used.
In addition, DRAMs serve as volatile memory devices, such that data of the DRAMs is preliminarily provided and stored in a flash memory device when the DRAMs are powered off.